1. Field of the Invention
The present invention relates, in general, to a bipolar alignment mark structure for a semiconductor device which is used to align pattern masks with a semiconductor substrate so as to overlap the pattern masks with patterns formed over the semiconductor substrate and, more particularly, to a bipolar alignment mark structure capable of indicating standard coordinates on the semiconductor substrate, accurately and distinctively. The present invention also is concerned with a process for forming the bipolar alignment mark structure.
2. Description of Prior Art
Generally, a fabrication process for semiconductor device comprises the use of a plurality of light-exposure masks with different pattern shapes in such a manner to put one to another, so as to form circuit devices, multilayer wires and contacts over the surface of semiconductor substrate. Such many light-exposure masks are located over the semiconductor substrate by stages according to process order.
In order to align the light-exposure masks stepwise, it is necessary to take for a standard a patterned mark which is formed on the semiconductor substrate. Usually, the patterned mark to be used to align the light-exposure masks is called "alignment key" or "alignment mark", hereinafter referred to as "alignment mark" for convenience.
There is a stepper, an alignment equipment which positions one light-exposure mask or aligns two or more light-exposure masks with one another over semiconductor substrate by use of the alignment mark. The stepper is a light-exposure equipment operating in step-and-repeat manner, which is movable on plane, e.g. in X-Y directions and has a stage capable of mounting a wafer thereon. In addition, the stepper is provided with a mark-detecting equipment which senses an alignment state of the light-exposure masks by detecting the alignment marks formed over the wafer. According to the output from the mark-detecting equipment, the stage moves the wafer forward and backward or leftward and rightward to align the water with the light-exposure mask in such a way that a pattern region formed over the wafer entirely overlaps with a pattern region formed on the light-mask fixed above the wafer. Meanwhile, the mark-detecting equipment irradiates the alignment marks on the wafer and light-exposure mask with a laser beam with a frequency and senses the reflected beam passing through a predetermined optical passage system to a light sensor, so as to detect the position of the alignment marks.
The alignment marks, which are used to align the wafer and the light-exposure masks as previously mentioned, are formed over scribe regions, parts of semiconductor substrate where no integrated circuit is formed. And, they are formed in such a way so as to generate steps at the scribe regions.
However, since conventional alignment marks of semiconductor substrate are formed in monopolar arrangement having merely either depression or prominence, material layers coated sequentially over them during the fabrication process for integrated circuit cannot help but have limitedly enlarged stepped portions. Owing to such limitation in the stepped portion, a problem is generated in that the conventional monopolar alignment mark cannot play a role as standard coordinates as the number of layer formed over the monopolar alignment mark is increased. This is because the stepped portion comes to disappear or be indistinguishable as material layers are piled over the monopolar alignment mark. Such removal or indistinctness of the stepped portion leads to incapability of accurately indicating standard coordinates on the semiconductor substrate. In addition, the monopolar alignment mark with no or indistinguishable step is incapacitated from playing a role of standard coordinate.
As a result, conventional monopolar alignment marks formed over the semiconductor substrate are likely to cause the misalignment of light-exposure mask with the semiconductor device, considerably lowering the production yield of semiconductor device.
In order to better understand the background of the invention, conventional monopolar alignment mark will be now described with reference to FIGS. 1 through 4. This description is on the premise that the monopolar alignment marks shown in FIGS. 1 through 4 are applied to fabrication processes for DRAM or SRAM device.
Referring to FIGS. 1 and 2, there are a plane view showing conventional positive polar alignment marks with a shape of prominence and depression and a cross sectional view taken generally through line II--II of FIG. 1, respectively.
On a scribe region of a semiconductor substrate 11, as shown in these figures, there is first entirely coated a first remaining layer 13. This first remaining layer 13 may be formed by, for example, a polysilicon-coating process for the formation of capacitor. A plurality of positively polar alignment marks 15 of rectangular column are aligned parallel to and regularly distant from one another, on the surface of the first remaining layer 13. The positively polar alignment marks 15 may be formed by forming a second remaining layer of inter-polyoxide film or of planarization film and patterning the second remaining layer by means of etch. Thereafter, a predetermined material, for example, a metal is uniformly coated on the positively polar alignment marks 15 and on the exposed area of the first remaining layer 13 to form a third remaining layer 17. There are generated steps A on the surface of the third remaining layer 17 each of which has a height corresponding to the altitude of the rectangular column, as shown in FIG. 2. A laser beam incident to the stepped portion formed on the surface of the third remaining layer 17 is diffusely reflected, so that the positively polar alignment marks can be detected by the mark-detecting equipment of stepper.
Referring now to FIGS. 3 and 4, there are shown a conventional semiconductor device having a plurality of negatively polar alignment marks and a cross sectional view taken generally through line IV--IV of FIG. 3, respectively.
First, as shown in these figure, on a scribe region of a semiconductor substrate 21, there is entirely coated a first remaining layer 23. This first remaining layer 13 may be formed by a predetermined process, for example, a polysilicon-coating process for the formation of capacitor. Following completion of the coating, on the first remaining layer 23, there is formed a second remaining layer pattern 25 where a plurality of negatively polar alignment marks 26 is present parallel to and regularly distant to one another. The negatively polar alignment marks 26 have a form of groove and expose the first remaining layer 23 partly therethrough. The second remaining layer pattern 2S may be formed by a predetermined process comprising, for example, coating an inter-polyoxide film on the first remaining layer 23 to form a second remaining layer and patterning the second remaining layer by means of etch. Thereafter, a predetermined material, for example, a metal is uniformly coated on the second remaining layer pattern 25 and the exposed areas of the first remaining layer 23 to form a third remaining layer 27. There are generated steps B on the surface of the third remaining layer 27, each of which has a height corresponding to the thickness of the second remaining layer pattern 25, as shown in FIG. 4. A laser beam incident to the stepped portion formed on the surface of the third remaining layer 27 is diffusely reflected, which capacitates the mark-detecting equipment of the stepper to detect the negatively polar alignment marks.
Such conventional monopolar alignment marks as have either positive or negative polarity cannot but help limitedly enlarging the step at the surface of the remaining layer laminated on themselves, as mentioned hereinbefore. Further, conventional monopolar alignment mark has such a problem attributed to the limited step that it is incapacitated from indicating standard coordinates on the semiconductor substrate as the number of the layers piled on the alignment mark is increased. Furthermore, it is more difficult for the conventional monopolar alignment mark to indicate standard coordinates on the semiconductor substrate when a metal layer is coated on the alignment mark. With the conventional monopolar alignment mark structure, as a result, the semiconductor substrate cannot be aligned with light-exposure masks accurately, and production yield in semiconductor device is considerably lowered. The above problems are more serious as the distance between wires is reduced with a highly integrated semiconductor device.